1. Field of the Invention
The application relates to failure diagnosis for estimating the location of failure that occurs in a semiconductor integrated circuit device.
2. Description of the Related Art
In recent years, as a manufacturing test of a semiconductor integrated circuit device, a BIST method has been used more frequently than a SCAN test method. Use of a BIST method makes failure diagnosis for estimating the location of failure more difficult than the case where a SCAN test method is used. In failure diagnosis of a semiconductor integrated circuit device using a BIST method, there are some case that the BIST method cannot be employed according to the state of operation of the circuit. Therefore, there is a need to estimate the location of failure independent of the state of operation of the circuit.
A method that meets the above need is described, for example, in “Computer Independent Direct Diagnosis”, Wu-Tung Cheng et al., IEEE Computer Society, 2004, pp. 204-209.